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Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - Kong, Jeong-Taek; Overhauser, David
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Kong, Jeong-Taek; Overhauser, David:

Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - Prima edizione

1995, ISBN: 0792395808

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[EAN: 9780792395805], Gebraucht, sehr guter Zustand, [SC: 5.79], [PU: Kluwer Academic Publishers, Norwell, Massachusetts, U.S.A.], White hardcover with white lettering on spine and upper … Altro …

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Kong, Jeong-Taek; Overhauser, David:

Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - Prima edizione

1995, ISBN: 0792395808

edizione con copertina rigida

[EAN: 9780792395805], D'occasion, très bon état, [SC: 5.7], [PU: Kluwer Academic Publishers, Norwell, Massachusetts, U.S.A.], White hardcover with white lettering on spine and upper board… Altro …

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Kong, Jeong-Taek; Overhauser, David:
Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - Prima edizione

1995

ISBN: 0792395808

edizione con copertina rigida

[EAN: 9780792395805], Gebraucht, sehr guter Zustand, [PU: Kluwer Academic Publishers, Norwell, Massachusetts, U.S.A.], White hardcover with white lettering on spine and upper board and co… Altro …

NOT NEW BOOK. Costi di spedizione: EUR 5.79 PsychoBabel & Skoob Books, Didcot, Oxfordshire, OXON, United Kingdom [2917279] [Rating: 5 (von 5)]
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Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing) - copertina rigida, flessible

1995, ISBN: 9780792395805

Norwell, Massachusetts, U.S.A.: Kluwer Academic Publishers, 1995. White hardcover with white lettering on spine and upper board and contents in very good clean condition, showing minimal … Altro …

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Digital Timing Macromodeling for VLSI Design Verification - Jeong-Taek Kong/ David V. Overhauser
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Digital Timing Macromodeling for VLSI Design Verification - copertina rigida, flessible

ISBN: 0792395808

Digital Timing Macromodeling for VLSI Design Verification ab 181.99 € als gebundene Ausgabe: Auflage 1995. Aus dem Bereich: Bücher, Wissenschaft, Technik, Medien > Bücher, Springer US

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Digital Timing Macromodeling for VLSI Design Verification
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0792395808


Digital Timing Macromodeling for VLSI Design Verification first of all provides an extensive history of the development of simulation techniques. It presents detailed discussion of the various techniques implemented in circuit, timing, fast-timing, switch-level timing, switch-level, and gate-level simulation. It also discusses mixed-mode simulation and interconnection analysis methods. The review in Chapter 2 gives an understanding of the advantages and disadvantages of the many techniques applied in modern digital macromodels. The book also presents a wide variety of techniques for performing nonlinear macromodeling of digital MOS subcircuits which address a large number of shortcomings in existing digital MOS macromodels. Specifically, the techniques address the device model detail, transistor coupling capacitance, effective channel length modulation, series transistor reduction, effective transconductance, input terminal dependence, gate parasitic capacitance, the body effect, the impact of parasitic RC-interconnects, and the effect of transmission gates. The techniques address major sources of errors in existing macromodeling techniques, which must be addressed if macromodeling is to be accepted in commercial CAD tools by chip designers. The techniques presented in Chapters 4-6 can be implemented in other macromodels, and are demonstrated using the macromodel presented in Chapter 3. The new techniques are validated over an extremely wide range of operating conditions: much wider than has been presented for previous macromodels, thus demonstrating the wide range of applicability of these techniques.

Informazioni dettagliate del libro - Digital Timing Macromodeling for VLSI Design Verification


EAN (ISBN-13): 9780792395805
ISBN (ISBN-10): 0792395808
Copertina rigida
Anno di pubblicazione: 1995
Editore: Springer-Verlag GmbH
292 Pagine
Peso: 0,602 kg
Lingua: eng/Englisch

Libro nella banca dati dal 2007-10-21T19:40:29+02:00 (Rome)
Pagina di dettaglio ultima modifica in 2023-10-27T21:27:12+02:00 (Rome)
ISBN/EAN: 0792395808

ISBN - Stili di scrittura alternativi:
0-7923-9580-8, 978-0-7923-9580-5
Stili di scrittura alternativi e concetti di ricerca simili:
Autore del libro : jeong, kong, overhaus
Titolo del libro: engineering design, digital timing macromodeling for vlsi design verification, digital design and computer architecture, design and the computer, architecture science

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